> > Since the 848 will burst in order the obvious approach to me would be to map > > the FPGA 32bit wide FIFO register across an entire 2Mb of PCI space. Just > > forget to decode a few bits 8) > > Doesn't nvidia have a patent on this? I thought one of things they sued 3dfx > over was mapping a register over an address range, so burst transfers that are > designed to write blocks of memory can write to a single register efficiently. Well if they did them its laughable. The ancient ISA bus Pro Movie Studio has a fifo mapped over a memory range. This is an old old idea. I learned it in college from people who thought it was standard things you should know
