On Thu, 15 Feb 2001, Alan Cox wrote: > > would take a seperate sequencer instruction to the bt848 DMA controller each > > time you want to reset the address back to the start. It's not going to work > > if you want to do this for every pixel, but you had a window 16 or 32 pixels > > wide in the FPGA's PCI address space, you could probably do it. > > Since the 848 will burst in order the obvious approach to me would be to map > the FPGA 32bit wide FIFO register across an entire 2Mb of PCI space. Just > forget to decode a few bits 8) Doesn't nvidia have a patent on this? I thought one of things they sued 3dfx over was mapping a register over an address range, so burst transfers that are designed to write blocks of memory can write to a single register efficiently.
