On Wed, May 22, 2002 at 01:21:26PM +0800, Kevin Liao wrote: > Thanks a lot for your information. I am using VIA's chipsets and CPU too! > But I can only find patches for Windows on that web site. Could you kindly > tell us where we can find patches for Linux? Thanks again! Thanks too for the valuable hints. http://www.tecchannel.de/hardware/817/8.html " The PCI-Latency-Patch with Version 0.19 mainly changes the following settings by setting registers in the northbridge: Turns off options "PCI Delay Transaction" and "PCI Master Read Caching" (Registers 70, Bit 1 and 2). Sets Arbitration-Timer of the PCI-Controller to 96 clock cycles. One typical BIOS-default is 32 clocks. This new setting is made to work around the older IDE bug in VIAs 686B southbridge (Register 75, Bit 0-2 or 0-3, depending on chipset). The VIA PCI controller's "PCI Latency" timer, which is normally used to guarantee the CPU at least a specified number of PCI clock cycles when accessing the PCI bus, is set to zero. (Register 0D) The CPU is removed from PCI priority rotation. Ordinarily, the CPU can be guaranteed access to the PCI bus after one to three other devices have used the bus. (Register 76, bits 4 and 5, and bit 7 on older chipsets)." I guess it should be possible to set this registers with linux too (setpci or using /proc ). But I do not yet know how to do it ;-) Matthias
