Trent Piepho wrote: > > On Thu, 7 Sep 2000, Justin Schoeman wrote: > > Just a quick comment on this thread: (from the bt848 pdf) > > "WRITE, WRITEC and SKIP ... control the sequence of packed data written > > to target memory on a byte resolution basis." > > > > So there are no problems doing byte-aligned clips. I have tested this > > myself (with bttv2), and it works perfectly (single pixel wide clips, > > that is, but you obviously only get a small piece of the image before > > running out of RISCMEM). I seem to remember looking at bttv's clipping > > code once, and (at least at that stage), there were a number of possible > > RISC memory overflows. > > Did you test it in 32bpp mode? With dword wide data, getting single pixel > clips is easy. Tested in 8, 16 and 24 bpp. > The overlay code in the v4l driver is pretty bad. It doesn't use WRITEC > instructions, which means that each pixel would written with a WRITE > instruction, which requires a destination address. While the bt848 > documentation doesn't say one way or the other if an address must be dword > aligned, I've seen a couple posts that say that they must. > > Just what the bt848 does with non-dword skip and write instructions is > entirely unclear to me. The manual doesn't help much, but some bits that > appear relevant: > > p43, "The FIFO block ... outputs DWORDs to the DMA Controller ..." > > Seems pretty clear that the FIFO can only pass data to the DMA controller in > dword wide blocks. > > p48, "The Bt848's FIFO DWORDs are perfectly aligned to the PCI bus ..." > > So writing the dwords of data from the FIFO to the PCI bus to a non-aligned > address isn't possible. > > p52, [SKIP instruction] "Skip ... count # of bytes from the FIFO. This may > start and stop in the middle of a DWORD." > > Seems pretty clear that skipping non-dword aligned or long data is ok. This > text does NOT appear in the descriptions of the WRITE* instructions, which > implies that they are different. > > It's clear that writing byte wide data can be done using only dword wide > writes and skips, with careful use of the byte enables. If the bt848 is smart > enough do this automatically, and how it would do so, it not clear to me. The byte enables are more-or-less automatic. All writes are DWORD aligned, but the output of the FIFO has some automated logic to decide which byte addresses to actually modify. At least I assume this is so, because I never implemented byte enables, but the stippel test worked (in 8, 16 and 24 bpp modes - my X server didn't want to do 32bpp). -justin
