Hi!
I was wondering if anyone could confirm the following bits of the
saa7134 irq registers, or point me to some technical info? The datasheet
I found on Phillip's website doesn't seem to have this info.
Specifically I am interested in the interrupt enable bit for GPIO pin
16. Pins 18, 22, and 23 I reverse-engineered, but I can't work out what
the GPIO16 interrupt enable bits are. I presume the reason why there are
two enables is because they are rising/falling edge, but if GPIO16 is
where I think it is then it only has one enable.
Also I would like confirmation of the report bit for GPIO16.
I'm hoping someone has this info already, otherwise I'll work this out
manually.
Thanks,
- David.
#define SAA7134_IRQ2 (0x2c8 >> 2)
#define SAA7134_IRQ2_INTE_GPIO23A (1 << 17) /* certain */
#define SAA7134_IRQ2_INTE_GPIO23 (1 << 16) /* certain */
#define SAA7134_IRQ2_INTE_GPIO22A (1 << 15) /* certain */
#define SAA7134_IRQ2_INTE_GPIO22 (1 << 14) /* certain */
#define SAA7134_IRQ2_INTE_GPIO18A (1 << 13) /* certain */
#define SAA7134_IRQ2_INTE_GPIO18 (1 << 12) /* certain */
#define SAA7134_IRQ2_INTE_GPIO16 (1 << 11) /* guess */
#define SAA7134_IRQ2_INTE_SC2 (1 << 10)
#define SAA7134_IRQ2_INTE_SC1 (1 << 9)
#define SAA7134_IRQ2_INTE_SC0 (1 << 8)
...
#define SAA7134_IRQ_REPORT (0x2cc >> 2)
#define SAA7134_IRQ_REPORT_GPIO23 (1 << 17)
#define SAA7134_IRQ_REPORT_GPIO22 (1 << 16)
#define SAA7134_IRQ_REPORT_GPIO18 (1 << 15)
#define SAA7134_IRQ_REPORT_GPIO16 (1 << 14) /* guess */
#define SAA7134_IRQ_REPORT_LOAD_ERR (1 << 13)
#define SAA7134_IRQ_REPORT_CONF_ERR (1 << 12)
...
