Hello.
I think that the information do not arrive the first time that I send it,
but here is :
HARDWARE BINNING:
Is based in On-chip binning, the process of adding or combinning charge
packets from rectangular groups of pixel at a "summing point", which is
the output node capacitor of the CCD. These groups of pixels effectively
become single larger pixels, sometimes called "superpixels". On-chip
binning is achieved as follows.
Any number of rows can be co-added together in the serial register simply
by omintting the horizontal clocking sequence which usually occurs after
each vertical transfer. Likewise, when the horizontal register is
clocked, the charges of any number of pixels can be combined on the
output capacitor by simply omitting the reset pulse which usually occurs
between each horizontal transfer. By not running the horizontal (serial) clocks after a
vertical transfer, the next vertical transfer will co-add the next row of
charges into the horizontal register. Similary, by not reseting the output
transistor after a pixel has been read out, the charge associated with the
following pixel will be co-added with the first. In this way rows and
columns can be "binned" together. The final picture has smaller dimensions
and less resolution, but it may have higher signal-to-noise because more
signal was combined "on-chip" before the noise of the readout process was
added. of course, care must be taken to avoid saturation. A 1024 x 1024
CCD using 4 x 4 pixel on-chip binning (omit four horizontal transfers and
four reset pulses) will producean image with only 256 x 256 pixels. This
technique is also used for optimizing the resolution in variable seeing
conditions or to obtain a preliminary look a field containing very faint
sources. A clock sequence which has these properties can be "called up"
when required if the sequencer is based on a programmable design.
This is basically the concept of hardware binning, in this link you will
be able to find more information:
http://www.roperscientific.com/library_enc_binning.shtml
The function to do harware binning will be made by us.
We are convinced that all the drivers for astronomical applications can
be done with V4L. Therefore we wonder if some of the V4L developers
could add one Capability such as it allow us:
1) To establish that the CCD that is being used is of astronomical type
(as VID_TYPE_CAPTURE or VID_TYPE_OVERLAY are declared).
This new Capability will need to enable 3 variables as follows:
1) To indicate that there is an electronics shutter.
2) To vary the integration time or exposure time.
3) To establish the binning size, for instance, 2 x 2, 4 x 4 (pixel's).
If these characteristics are added in the capabilities, a user only
would need to apply them to his/her particular CCD. By doing so, it will
be possible to standardize the use of V4L for astronomical applications.
In summary, we need this new Capability, to be able to implement, by using
the capture functions that already exist in V4L, specific capture
functions for astronomical CCD's.
If you need further information, please do contact us, our e-mail address
are:
Ing. Gabriela Molar : premolar@xxxxxxxxx
Dr. Esperanza Carrasco : bec@xxxxxxxxx
Dr. Jorge Pedraza : jpch@xxxxxxxxx
Thanks in advance. Looking forward to hearing from you,
Gabriela.
